As more packetized data is being transmitted on the telephone network, there is a need for increasing the speed (bandwidth) of the network. Modern telecommunications networks can only be as fast as the packet switching systems used to route the data packets from source to destination. Therefore, there is a need for higher bandwidth packet switching systems.
Switching systems are relying more and more on distributed control to increase the speed at which they can switch data packets and voice calls. Distributed control switching systems, which are conceptually small telecommunications networks, use packet switching for communicating control information rapidly among the distributed processors. Without fast communication of control information, the capacity of the switch becomes limited by the number of control messages that can be handled at one time, thus causing a bottleneck in the network. Therefore, both the network in general, and distributed processing switching systems specifically, have a need for high bandwidth packet switching.
Various packet switching systems have been tried for routing control information in distributed processing switching systems with varying degrees of success. Some systems have provided a separate controller bus structure to be used for all communications among the processors. Other systems have utilized dedicated communication paths of the switching system to provide communication between the distributed system processors and a central controller which interprets control information and directs the overall operation of the switching system. These known systems, however, require that complex and time consuming operations be performed in their implementations. Such systems cannot take full advantage of distributed processing due to their reliance on a central controller to direct the distributed processors.
A control information communication arrangement in accordance with the invention of U.S. Pat. No. 4,322,843 of H. J. Beuscher et al., issued Mar. 30, 1982, achieves the benefits of interprocessor communication while reducing the complexity and time consuming nature of previous arrangements. In accordance with one exemplary embodiment of the invention of the Beuscher patent, control units intercommunicate via certain switching system communication paths by means of control messages or packets comprising a plurality of control words. A control distribution unit included in the system accumulates the received control words into control packets and stores all such control packets in a shared memory. The control packets are then sequentially packet switched by transferring the packets individually from shared memory to appropriate facilities for subsequent transmission to destination control units defined by the packet headers. However, the sequential nature of the packet switching mechanism substantially limits the capacity of the control distribution unit to switch control packets. This limitation becomes particularly significant when the system control processors are used to implement features associated with the provision of integrated services digital network (ISDN) capabilities.
One potential solution to this problem is found in U.S. Pat. No. 4,821,259 of DeBruler et al., issued Apr. 11, 1989, wherein a packet switch for inter-module communication within a switch is disclosed which packet switches inter-module control packets via independent paths to high speed outgoing packet channels for transmission to destination control units. A ring-based packet switch is disclosed in one exemplary embodiment of the invention of the DeBruler patent, with a circuit-switched fabric controlled in real time by a high speed, multiple token passing ring. However, this system is expensive to retrofit onto an existing switching system because packet channels and circuit channels have to be segregated when the link first enters the intermodule connection unit, and because modifications must be made to each module of the distributed processing switch that communicates through this system, as well as each packet and circuit switching control units.
Furthermore, each of these packet switches have buffering of the incoming data packet at the input port. Such buffering requires at least the duration of receipt of a packet to accumulate a data packet before it is routed through the packet switch, thus taking time before the packet can be switched. Furthermore, moving an entire data packet through a switch is a time-consuming process. In some examples, such as DeBruler, the data packet is again buffered at the output port, requiring more time. Therefore, buffering of packets before and/or after switching causes loss of performance in known packet switches.
In view of the foregoing, a recognized problem in the art is the limited capacity of packet switching facilities used for interprocessor control communication in distributed processing switching systems.